1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more specifically to a semiconductor integrated circuit composed of a plurality of cascased basic unitary circuits formed of MOS transistors.
2. Description of Related Art
Recently, systems constituted of semiconductor integrated circuits have rapidly improved their performance, and accordingly, the semiconductor integrated circuits incorporated in the systems have been required to have even better performance. By way of example, SRAMs (static random access memory) have been subjected to a rapidly increasing request for an operation speed, with an increasing application of the SRAM as a main memory for a supercomputer and others.
In order to fulfill the desire for the operation speed, it is necessary to shorten a response time of MOS transistors which constitute the semiconductor integrated circuit. However, main conventional means include improvement of a process technology, such as decrease of input gate capacitance due to a skate ring of MOS transistors, and increase of current driving capability.
In addition to improvement by the process technology, a speed-up due to improvement of circuit technology is required in order to improve the operation speed. However, a clear procedure for designing the gate length and the gate width of MOS transistors which are the basis for speeding-up of the response time has not yet been shown, and therefore, these factors have been determined by a trial-and-error manner such as by simulation.
As mentioned above, in order to obtain the high speed operation, the conventional semiconductor integrated circuits have been configured to determine the size of MOS transistors by means of the process technology and the trial-and-error type design procedure such as by simulation. In other words, it has not been possible to obtain a semiconductor integrated circuit having the highest operation speed supported by a theory. In addition, a long time has been required until an expected performance is obtained.